Memory Compiler IP EDA Views

Documentation:

  • Memory Description Document (MDD)
  • Customer Application Note (CAN)
  • Datasheet Document (DSD)
  • Memory Compiler Generator User Guide

Front-end Views:

  • Datasheet
  • Verilog
  • Fast Verilog (Verilog Behavioral Model without timing back-annotation capability)

Timing and Power Library:

  • NLDM
  • CCS
  • ECSM
  • LVF (or AOCV)
  • RHLIB (Redhawk)

DFT Views:

  • Tessent Fastscan
  • Tetramax
  • Tessent MBIST
  • CTL
  • TCAM Priority Encoder RTL
  • EBIST (Embedded BIST) RTL

Back-end Views:

  • LEF (or DEF)
  • CDL (LVS netlist)
  • Bitmap info (memory bit x-y coordinate)
  • GDS

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