Position: IP Design Engineer (DE) 

  • Job category: Engineering 
  • Job type: Full – time 
  • Experience Level: Junior / Early Mid-Level Engineer (1–3 years) 
  • Location: Ho Chi Minh City, Vietnam 

About Connexus:  

Connexus is a fast-growing fabless semiconductor startup focused on AI chips and advanced chip design services. We aim to empower the next generation of AI workloads with cutting-edge technologies, while building a collaborative, innovative, and people-first culture. 

Responsibilities 

  • Support development of Foundation IP including Standard Cell Libraries, SRAM bitcells, and SRAM peripheral circuits for advanced semiconductor technologies. 
  • Participate in SRAM bitcell design, evaluation, and optimization for stability, performance, and power efficiency. 
  • Perform SPICE simulations to verify functionality, timing, power, and stability of SRAM bitcells, memory periphery circuits, and standard cells. 
  • Conduct SRAM bitcell analysis, including: 
  • Read / write margin 
  • Static Noise Margin (SNM) 
  • Leakage and retention behavior 
  • PVT variation impact 
  • Support characterization of timing, power, and leakage data across multiple PVT conditions. 
  • Assist in generating and validating Liberty (.lib) timing and power models for standard cell and memory IP. 
  • Analyze and debug circuit behavior and simulation results to ensure design correctness. 
  • Develop or maintain automation scripts for characterization flows, data processing, and validation. 
  • Collaborate closely with layout engineers, CAD teams, and design leads to ensure design quality and DRC/LVS compliant layouts. 
  • Participate in design reviews, validation checks, and documentation preparation for IP release. 

Requirements 

  • Bachelor’s or Master’s degree in: 
  • Electronics Engineering 
  • Microelectronics 
  • Electrical Engineering 
  • Telecommunications 
  • Computer Engineering 
  • Physics, IT, Math & Computer Science; or related fields. 
  • 1–3 years of experience in semiconductor circuit design, memory IP design, or standard cell library development. 
  • Understanding of CMOS circuit design fundamentals and digital logic design. 
  • Basic knowledge of SRAM architecture and memory circuits. 
  • Familiarity with SPICE simulation tools (HSPICE, Spectre, or equivalent). 
  • Familiar with Linux/Unix environment. 

 

Apply via email: job@connexus.vn